[riscv-port] RFR: 8280116: riscv: RVB: Add rest instructions of zba, zbb, and bitwise rotation [v2]
Feilong Jiang
fjiang at openjdk.java.net
Tue Jan 18 08:47:29 UTC 2022
> This PR has the following changes:
> 1. Implement rest instructions of zba, zbb and bitwise rotation sub-extension
> 2. Add non-rvb version of AbsI/AbsL
>
> Within this PR, zba, zbb and bitwise rotation of RISC-V Bit-Manipulation are fully supported in riscv-port.
>
> New C2 instructions are covered by the JTREG tests hotspot:tier1
Feilong Jiang has updated the pull request with a new target base due to a merge or a rebase. The incremental webrev excludes the unrelated changes brought in by the merge/rebase. The pull request contains two additional commits since the last revision:
- Merge branch 'riscv-port' of https://github.com/openjdk/riscv-port into rvb-rest
- 8280116: riscv: RVB: Add rest instructions of zba, zbb, and bitwise rotation
-------------
Changes:
- all: https://git.openjdk.java.net/riscv-port/pull/47/files
- new: https://git.openjdk.java.net/riscv-port/pull/47/files/33436edf..94becf2d
Webrevs:
- full: https://webrevs.openjdk.java.net/?repo=riscv-port&pr=47&range=01
- incr: https://webrevs.openjdk.java.net/?repo=riscv-port&pr=47&range=00-01
Stats: 1146 lines in 44 files changed: 924 ins; 120 del; 102 mod
Patch: https://git.openjdk.java.net/riscv-port/pull/47.diff
Fetch: git fetch https://git.openjdk.java.net/riscv-port pull/47/head:pull/47
PR: https://git.openjdk.java.net/riscv-port/pull/47
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