[riscv-port] RFR: 8280116: riscv: RVB: Add rest instructions of zba, zbb, and bitwise rotation [v2]
Feilong Jiang
fjiang at openjdk.java.net
Tue Jan 18 12:16:03 UTC 2022
On Tue, 18 Jan 2022 08:47:29 GMT, Feilong Jiang <fjiang at openjdk.org> wrote:
>> This PR has the following changes:
>> 1. Implement rest instructions of zba, zbb and bitwise rotation sub-extension
>> 2. Add non-rvb version of AbsI/AbsL
>>
>> Within this PR, zba, zbb and bitwise rotation of RISC-V Bit-Manipulation are fully supported in riscv-port.
>>
>> New C2 instructions are covered by the JTREG tests hotspot:tier1
>>
>> Hotspot and jdk tier1 tests on QEMU (with and without UseRVB) are passed without new failures.
>
> Feilong Jiang has updated the pull request with a new target base due to a merge or a rebase. The incremental webrev excludes the unrelated changes brought in by the merge/rebase. The pull request contains two additional commits since the last revision:
>
> - Merge branch 'riscv-port' of https://github.com/openjdk/riscv-port into rvb-rest
> - 8280116: riscv: RVB: Add rest instructions of zba, zbb, and bitwise rotation
Thanks for reviews.
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PR: https://git.openjdk.java.net/riscv-port/pull/47
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