May 2023 Archives by subject

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Starting: Tue May 2 05:12:41 UTC 2023
Ending: Wed May 31 10:59:27 UTC 2023
Messages: 72

[riscv-port-jdk17u:riscv-port] Integrated: 8296435: RISC-V: Small refactoring for increment/decrement Dingli Zhang
[riscv-port-jdk17u:riscv-port] Integrated: 8296916: RISC-V: Move some small macro-assembler functions to header file Dingli Zhang
[riscv-port-jdk17u:riscv-port] Integrated: 8297359: RISC-V: improve performance of floating Max Min intrinsics Vladimir Kempik
[riscv-port-jdk17u:riscv-port] Integrated: 8297697: RISC-V: Add support for SATP mode detection Gui Cao
[riscv-port-jdk17u:riscv-port] Integrated: 8301036: RISC-V: Factor out functions baseOffset & baseOffset32 from MacroAssembler Dingli Zhang
[riscv-port-jdk17u:riscv-port] Integrated: 8301153: RISC-V: pipeline class for several instructions is not set correctly Gui Cao
[riscv-port-jdk17u:riscv-port] Integrated: 8301628: RISC-V: c2 fix pipeline class for several instructions Dingli Zhang
[riscv-port-jdk17u:riscv-port] Integrated: 8301852: RISC-V: Optimize class atomic when order is memory_order_relaxed Dingli Zhang
[riscv-port-jdk17u:riscv-port] Integrated: 8306667: RISC-V: Fix storeImmN0 matching rule by using zr register Xiaolin Zheng
[riscv-port-jdk17u:riscv-port] Integrated: 8307150: RISC-V: Remove remaining StoreLoad barrier with UseCondCardMark for Serial/Parallel GC Feilong Jiang
[riscv-port-jdk17u:riscv-port] Integrated: 8307446: RISC-V: Improve performance of floating point to integer conversion Feilong Jiang
[riscv-port-jdk17u:riscv-port] Integrated: 8307651: RISC-V: stringL_indexof_char instruction has wrong format string Feilong Jiang
[riscv-port-jdk17u:riscv-port] Integrated: 8308089: [riscv-port-jdk17u] Intrinsify Unsafe.storeStoreFence Xiaolin Zheng
[riscv-port-jdk17u:riscv-port] Integrated: 8308277: RISC-V: Improve vectorization of Match.sqrt() on floats Feilong Jiang
[riscv-port-jdk17u:riscv-port] RFR: 8296435: RISC-V: Small refactoring for increment/decrement Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8296435: RISC-V: Small refactoring for increment/decrement Dingli Zhang
[riscv-port-jdk17u:riscv-port] RFR: 8296916: RISC-V: Move some small macro-assembler functions to header file Dingli Zhang
[riscv-port-jdk17u:riscv-port] RFR: 8296916: RISC-V: Move some small macro-assembler functions to header file Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8296916: RISC-V: Move some small macro-assembler functions to header file Dingli Zhang
[riscv-port-jdk17u:riscv-port] RFR: 8297359: RISC-V: improve performance of floating Max Min intrinsics Vladimir Kempik
[riscv-port-jdk17u:riscv-port] RFR: 8297359: RISC-V: improve performance of floating Max Min intrinsics Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8297697: RISC-V: Add support for SATP mode detection Gui Cao
[riscv-port-jdk17u:riscv-port] RFR: 8297697: RISC-V: Add support for SATP mode detection Feilong Jiang
[riscv-port-jdk17u:riscv-port] RFR: 8297697: RISC-V: Add support for SATP mode detection Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8301036: RISC-V: Factor out functions baseOffset & baseOffset32 from MacroAssembler Dingli Zhang
[riscv-port-jdk17u:riscv-port] RFR: 8301036: RISC-V: Factor out functions baseOffset & baseOffset32 from MacroAssembler Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8301036: RISC-V: Factor out functions baseOffset & baseOffset32 from MacroAssembler Dingli Zhang
[riscv-port-jdk17u:riscv-port] RFR: 8301153: RISC-V: pipeline class for several instructions is not set correctly Gui Cao
[riscv-port-jdk17u:riscv-port] RFR: 8301153: RISC-V: pipeline class for several instructions is not set correctly Feilong Jiang
[riscv-port-jdk17u:riscv-port] RFR: 8301153: RISC-V: pipeline class for several instructions is not set correctly Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8301628: RISC-V: c2 fix pipeline class for several instructions Dingli Zhang
[riscv-port-jdk17u:riscv-port] RFR: 8301628: RISC-V: c2 fix pipeline class for several instructions Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8301628: RISC-V: c2 fix pipeline class for several instructions Dingli Zhang
[riscv-port-jdk17u:riscv-port] RFR: 8301818: RISC-V: Factor out function mvw from MacroAssembler Gui Cao
[riscv-port-jdk17u:riscv-port] RFR: 8301818: RISC-V: Factor out function mvw from MacroAssembler Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8301852: RISC-V: Optimize class atomic when order is memory_order_relaxed Dingli Zhang
[riscv-port-jdk17u:riscv-port] RFR: 8301852: RISC-V: Optimize class atomic when order is memory_order_relaxed Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8301852: RISC-V: Optimize class atomic when order is memory_order_relaxed Dingli Zhang
[riscv-port-jdk17u:riscv-port] RFR: 8302289: RISC-V: Use bgez instruction in arraycopy_simple_check when possible Gui Cao
[riscv-port-jdk17u:riscv-port] RFR: 8302289: RISC-V: Use bgez instruction in arraycopy_simple_check when possible Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8305008: RISC-V: Factor out immediate checking functions from assembler_riscv.inline.hpp Dingli Zhang
[riscv-port-jdk17u:riscv-port] RFR: 8305008: RISC-V: Factor out immediate checking functions from assembler_riscv.inline.hpp Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8306667: RISC-V: Fix storeImmN0 matching rule by using zr register Xiaolin Zheng
[riscv-port-jdk17u:riscv-port] RFR: 8306667: RISC-V: Fix storeImmN0 matching rule by using zr register Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8307150: RISC-V: Remove remaining StoreLoad barrier with UseCondCardMark for Serial/Parallel GC Feilong Jiang
[riscv-port-jdk17u:riscv-port] RFR: 8307150: RISC-V: Remove remaining StoreLoad barrier with UseCondCardMark for Serial/Parallel GC Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8307150: RISC-V: Remove remaining StoreLoad barrier with UseCondCardMark for Serial/Parallel GC Feilong Jiang
[riscv-port-jdk17u:riscv-port] RFR: 8307446: RISC-V: Improve performance of floating point to integer conversion Feilong Jiang
[riscv-port-jdk17u:riscv-port] RFR: 8307446: RISC-V: Improve performance of floating point to integer conversion Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8307446: RISC-V: Improve performance of floating point to integer conversion Feilong Jiang
[riscv-port-jdk17u:riscv-port] RFR: 8307651: RISC-V: stringL_indexof_char instruction has wrong format string Feilong Jiang
[riscv-port-jdk17u:riscv-port] RFR: 8307651: RISC-V: stringL_indexof_char instruction has wrong format string Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8307651: RISC-V: stringL_indexof_char instruction has wrong format string Feilong Jiang
[riscv-port-jdk17u:riscv-port] RFR: 8308089: (riscv-port-jdk17u) Intrinsify Unsafe.storeStoreFence Xiaolin Zheng
[riscv-port-jdk17u:riscv-port] RFR: 8308089: (riscv-port-jdk17u) Intrinsify Unsafe.storeStoreFence Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8308089: [riscv-port-jdk17u] Intrinsify Unsafe.storeStoreFence Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8308089: [riscv-port-jdk17u] Intrinsify Unsafe.storeStoreFence Xiaolin Zheng
[riscv-port-jdk17u:riscv-port] RFR: 8308089: [riscv-port-jdk17u] Intrinsify Unsafe.storeStoreFence Vladimir Kempik
[riscv-port-jdk17u:riscv-port] RFR: 8308089: [riscv-port-jdk17u] Intrinsify Unsafe.storeStoreFence Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8308277: RISC-V: Improve vectorization of Match.sqrt() on floats Feilong Jiang
[riscv-port-jdk17u:riscv-port] RFR: 8308277: RISC-V: Improve vectorization of Match.sqrt() on floats Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8308277: RISC-V: Improve vectorization of Match.sqrt() on floats Feilong Jiang
git: openjdk/riscv-port-jdk17u: riscv-port: 15 new changesets duke
git: openjdk/riscv-port-jdk17u: riscv-port: 18 new changesets duke
git: openjdk/riscv-port-jdk17u: riscv-port: 29 new changesets duke
git: openjdk/riscv-port-jdk17u: riscv-port: 60 new changesets duke
question about vector registers Vladimir Kempik
question about vector registers yangfei at iscas.ac.cn
question about vector registers Vladimir Kempik
question about vector registers yangfei at iscas.ac.cn
question about vector registers Vladimir Kempik
safepointing. read vs write Vladimir Kempik

Last message date: Wed May 31 10:59:27 UTC 2023
Archived on: Wed May 31 10:59:33 UTC 2023

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