April 2023 Archives by author

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Starting: Mon Apr 3 03:48:48 UTC 2023
Ending: Fri Apr 28 22:32:23 UTC 2023
Messages: 73

[riscv-port-jdk17u:riscv-port] RFR: 8294492: RISC-V: Use li instead of patchable movptr at non-patchable callsites Gui Cao
[riscv-port-jdk17u:riscv-port] Integrated: 8294492: RISC-V: Use li instead of patchable movptr at non-patchable callsites Gui Cao
[riscv-port-jdk17u:riscv-port] RFR: 8295270: RISC-V: Clean up and refactoring for assembler functions Gui Cao
[riscv-port-jdk17u:riscv-port] RFR: 8295270: RISC-V: Clean up and refactoring for assembler functions [v2] Gui Cao
[riscv-port-jdk17u:riscv-port] RFR: 8295270: RISC-V: Clean up and refactoring for assembler functions [v2] Gui Cao
[riscv-port-jdk17u:riscv-port] RFR: 8295270: RISC-V: Clean up and refactoring for assembler functions [v2] Gui Cao
[riscv-port-jdk17u:riscv-port] Integrated: 8295270: RISC-V: Clean up and refactoring for assembler functions Gui Cao
[riscv-port-jdk17u:riscv-port] RFR: 8293050: RISC-V: Remove redundant non-null assertions about macro-assembler Gui Cao
[riscv-port-jdk17u:riscv-port] Integrated: 8293050: RISC-V: Remove redundant non-null assertions about macro-assembler Gui Cao
[riscv-port-jdk17u:riscv-port] RFR: 8302776: RISC-V: Fix typo CSR_INSTERT to CSR_INSTRET Gui Cao
[riscv-port-jdk17u:riscv-port] Integrated: 8302776: RISC-V: Fix typo CSR_INSTERT to CSR_INSTRET Gui Cao
[riscv-port-jdk17u:riscv-port] RFR: 8294012: RISC-V: get/put_native_u8 missing the case when address&7 is 6 Gui Cao
[riscv-port-jdk17u:riscv-port] Integrated: 8294012: RISC-V: get/put_native_u8 missing the case when address&7 is 6 Gui Cao
[riscv-port-jdk17u:riscv-port] RFR: 8294679: RISC-V: Misc crash dump improvements Gui Cao
[riscv-port-jdk17u:riscv-port] Integrated: 8294679: RISC-V: Misc crash dump improvements Gui Cao
[riscv-port-jdk17u:riscv-port] RFR: 8294430: RISC-V: Small refactoring for movptr_with_offset Feilong Jiang
[riscv-port-jdk17u:riscv-port] RFR: 8296447: RISC-V: Make the operands order of vrsub_vx/vrsub_vi consistent with RVV 1.0 spec Feilong Jiang
[riscv-port-jdk17u:riscv-port] RFR: 8293566: RISC-V: Clean up push and pop registers Feilong Jiang
[riscv-port-jdk17u:riscv-port] RFR: 8296435: RISC-V: Small refactoring for increment/decrement Feilong Jiang
[riscv-port-jdk17u:riscv-port] RFR: 8294012: RISC-V: get/put_native_u8 missing the case when address&7 is 6 Vladimir Kempik
[riscv-port-jdk17u:riscv-port] RFR: 8297359: RISC-V: improve performance of floating Max Min intrinsics Vladimir Kempik
[riscv-port-jdk17u:riscv-port] RFR: 8294430: RISC-V: Small refactoring for movptr_with_offset Guoxiong Li
[riscv-port-jdk17u:riscv-port] RFR: 8296975: RISC-V: Enable UseRVA20U64 profile by default Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8296975: RISC-V: Enable UseRVA20U64 profile by default Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8305512: RISC-V: Enable RVC extension by default on supported hardware Fei Yang
[riscv-port-jdk17u:riscv-port] Withdrawn: 8305512: RISC-V: Enable RVC extension by default on supported hardware Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8290137: riscv: small refactoring for add_memory_int32/64 Fei Yang
[riscv-port-jdk17u:riscv-port] Withdrawn: 8290137: riscv: small refactoring for add_memory_int32/64 Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8293474: RISC-V: Unify the way of moving function pointer Fei Yang
[riscv-port-jdk17u:riscv-port] Withdrawn: 8293474: RISC-V: Unify the way of moving function pointer Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8294430: RISC-V: Small refactoring for movptr_with_offset Fei Yang
[riscv-port-jdk17u:riscv-port] Withdrawn: 8294430: RISC-V: Small refactoring for movptr_with_offset Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8294492: RISC-V: Use li instead of patchable movptr at non-patchable callsites Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8294430: RISC-V: Small refactoring for movptr_with_offset Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8295270: RISC-V: Clean up and refactoring for assembler functions [v2] Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8295968: RISC-V: Rename some assembler intrinsic functions for RVV 1.0 Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8293050: RISC-V: Remove redundant non-null assertions about macro-assembler Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8302776: RISC-V: Fix typo CSR_INSTERT to CSR_INSTRET Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8296447: RISC-V: Make the operands order of vrsub_vx/vrsub_vi consistent with RVV 1.0 spec Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8292867: RISC-V: Simplify weak CAS return value handling Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8293524: RISC-V: Use macro-assembler functions as appropriate Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8293566: RISC-V: Clean up push and pop registers Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8294012: RISC-V: get/put_native_u8 missing the case when address&7 is 6 Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8294679: RISC-V: Misc crash dump improvements Fei Yang
[riscv-port-jdk17u:riscv-port] RFR: 8290137: riscv: small refactoring for add_memory_int32/64 Dingli Zhang
[riscv-port-jdk17u:riscv-port] RFR: 8293474: RISC-V: Unify the way of moving function pointer Dingli Zhang
[riscv-port-jdk17u:riscv-port] RFR: 8294430: RISC-V: Small refactoring for movptr_with_offset Dingli Zhang
[riscv-port-jdk17u:riscv-port] RFR: 8295968: RISC-V: Rename some assembler intrinsic functions for RVV 1.0 Dingli Zhang
[riscv-port-jdk17u:riscv-port] Integrated: 8295968: RISC-V: Rename some assembler intrinsic functions for RVV 1.0 Dingli Zhang
[riscv-port-jdk17u:riscv-port] RFR: 8296447: RISC-V: Make the operands order of vrsub_vx/vrsub_vi consistent with RVV 1.0 spec Dingli Zhang
[riscv-port-jdk17u:riscv-port] Integrated: 8296447: RISC-V: Make the operands order of vrsub_vx/vrsub_vi consistent with RVV 1.0 spec Dingli Zhang
[riscv-port-jdk17u:riscv-port] RFR: 8292867: RISC-V: Simplify weak CAS return value handling Dingli Zhang
[riscv-port-jdk17u:riscv-port] Integrated: 8292867: RISC-V: Simplify weak CAS return value handling Dingli Zhang
[riscv-port-jdk17u:riscv-port] RFR: 8293524: RISC-V: Use macro-assembler functions as appropriate Dingli Zhang
[riscv-port-jdk17u:riscv-port] Integrated: 8293524: RISC-V: Use macro-assembler functions as appropriate Dingli Zhang
[riscv-port-jdk17u:riscv-port] RFR: 8293566: RISC-V: Clean up push and pop registers Dingli Zhang
[riscv-port-jdk17u:riscv-port] Integrated: 8293566: RISC-V: Clean up push and pop registers Dingli Zhang
[riscv-port-jdk17u:riscv-port] RFR: 8296435: RISC-V: Small refactoring for increment/decrement Dingli Zhang
[riscv-port-jdk17u:riscv-port] RFR: 8296975: RISC-V: Enable UseRVA20U64 profile by default Xiaolin Zheng
[riscv-port-jdk17u:riscv-port] RFR: 8305512: RISC-V: Enable RVC extension by default on supported hardware Xiaolin Zheng
[riscv-port-jdk17u:riscv-port] RFR: 8294492: RISC-V: Use li instead of patchable movptr at non-patchable callsites Xiaolin Zheng
[riscv-port-jdk17u:riscv-port] RFR: 8295270: RISC-V: Clean up and refactoring for assembler functions Xiaolin Zheng
[riscv-port-jdk17u:riscv-port] RFR: 8295270: RISC-V: Clean up and refactoring for assembler functions [v2] Xiaolin Zheng
git: openjdk/riscv-port-jdk17u: riscv-port: 16 new changesets duke
git: openjdk/riscv-port-jdk17u: riscv-port: 8305512: RISC-V: Enable RVC extension by default on supported hardware duke
git: openjdk/riscv-port-jdk17u: riscv-port: 8290137: riscv: small refactoring for add_memory_int32/64 duke
git: openjdk/riscv-port-jdk17u: riscv-port: 8293474: RISC-V: Unify the way of moving function pointer (#35) duke
git: openjdk/riscv-port-jdk17u: riscv-port: 8294430: RISC-V: Small refactoring for movptr_with_offset (#36) duke
git: openjdk/riscv-port-jdk17u: riscv-port: Update project to riscv-port duke
git: openjdk/riscv-port-jdk17u: riscv-port: 9 new changesets duke
git: openjdk/riscv-port-jdk17u: riscv-port: 11 new changesets duke
git: openjdk/riscv-port-jdk17u: riscv-port: 42 new changesets duke
git: openjdk/riscv-port-jdk17u: riscv-port: 4 new changesets duke

Last message date: Fri Apr 28 22:32:23 UTC 2023
Archived on: Fri Apr 28 22:33:27 UTC 2023

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